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(parent: 0bf9ce4) | patch
x86/cpuidle: do not flush cache unless entering C3
authorWei Wang <wei.wang2@amd.com>
Mon, 16 Apr 2012 11:05:28 +0000 (13:05 +0200)
committerWei Wang <wei.wang2@amd.com>
Mon, 16 Apr 2012 11:05:28 +0000 (13:05 +0200)
commit625550282c299d6607eb4bdb35b3ebadb5ae77b3
tree149fb79c74f714efcdb7ec0aebed2fbdfa58a4b3tree | snapshot
parent0bf9ce40626117fa21559547b751dcb67e1acf2dcommit | diff
x86/cpuidle: do not flush cache unless entering C3

Nor is there a need to disable bus master arbitration in that case.

Signed-off-by: Wei Wang <wei.wang2@amd.com>
Modified-by: Zhang, Yang Z <yang.z.zhang@intel.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Committed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/acpi/cpu_idle.c diff | blob | history
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